The invention relates to an integrated semiconductor device, including an insulated-gate field effect transistor biased to a constant level.
The invention is used for the manufacture of digital or analog circuits, for example an exclusive-NOR circuit, a frequency doubler circuit, a phase modulator circuit, a 0.degree.-180.degree. phase shifter circuit.
The properties of an insulated gate field effect transistor are known, for example from the publication "New Negative Resistance Regime of Heterostructure Insulated Gate Transistor Operation" by Michael F. SHUR et al, in "IEEE Electron Device Letters, Vol. EDL-7, No. 2, Feb. 1986".
This document describes the negative differential drain resistance effect which appears in a field-effect transistor comprising an N-type conduction channel with a GaAs-GaAlAs heterostructure and an insulated gate which is constantly biased to a high level.
The structure of this so-called HIGFET transistor comprises a non-intentionally doped GaAs layer having a thickness of 0.5 .mu.m which is realized on a semi-insulating GaAs substrate, followed by a non-intentionally doped GaAlAs layer which serves as a gate insulating layer on which a gate contact of WSi is realized. Source and drain regions are defined on either side of the gate by localized implantation of Si ions for the N-regions or Mg ions for the P regions. The ohmic contacts on these regions are formed by Au--Ge--Ni metallizations when the regions are of the N-type. The device is insulated by proton implantation. The gate has a length of 1.3 .mu.m and a width of 10 .mu.m.
At a fixed gate-source voltage of high value (approximately 3 V) in this device a decrease of the drain-source current occurs when the drain-source voltage changes from 0.8 to 1.25 V. Subsequently, at the same fixed gate-source voltage the drain-source current increases when the drain-source voltage changes from 1.25 V to higher values. These variations of the drain-source current as a function of the drain-source voltage at a constant and high gate-source voltage thus lead to the appearance of a negative drain resistance in saturation. This effect is due to a spatial transfer of the carriers in the channel which are collected by the gate.
The cited document does not describe any application of the negative drain resistance effect and does not reveal either that when such a transistor is used in given circumstances involving exact biasing, other interesting effects can also exist, notably a negative transconductance effect. Notably, the application of the latter effect is by no means mentioned. It is known, however, from the applications of a bipolar quantum-well transistor, referred to as a resonant hot electron transistor.
These applications of such a transistor are known, for example from the publication "A New Functional Resonant-tunneling Hot Electron Transistor" by NAOKI YOKOYAMA et al in "Japanese Journal of Applied Physics, Vol. 24, no. 11, Nov. 1985, pp. L853, L854". European Patent Application EP 0 225 698 deals with exactly the same subject.
One of said latter publications describes first of all a bipolar transistor with a quantum well disposed between the base and the emitter. This so-called resonant hot electron transistor is formed by a collector layer, a collector barrier layer, a base layer with a base contact, and a part which serves for the formation of a quantum-well which comprises an alternation of GaAlAs/GaAs layers, each of which has a thickness in the order of 50 .ANG. (5 nm), an emitter layer and an emitter contact. The collector contact is realized on the rear surface of the collector layer.
The quantum well between the base and the emitter has discrete carrier energy levels. By changing the emitter-base biasing, the energy of the levels of the well can be made equal to the lower side of the conduction band of the emitter material. According to this method the current characteristic as a function of the voltage of the base-emitter junction exhibits a peak followed by a discontinuity.
The cited publications teach that either an exclusive-NOR gate or a frequency multiplier circuit can be realized by means of such a transistor.
However, the type of transistor used for realizing such circuits has various drawbacks, such as:
first of all, it is extremely difficult to realize, it being notably difficult for the manufacturer of integrated circuits to realize several layers which are as thin as 5 nm and which are necessary for realizing the quantum well; PA1 moreover, the proposed circuits operate only at a temperature of 77.degree. K., which is a major drawback for the large scale applications envisaged, for example in the field of television; PA1 furthermore, in one application the frequency multiplication is realized by biasing the device around its current peak. Because the latter is followed by a discontinuity, an abrupt transition appears in the output signal, giving rise to a spectrum containing many higher harmonics. Therefore, if a purer signal is to be obtained, it is absolutely necessary to filter this signal before it can be used (see notably the publication in the Japanese Journal of Applied Physics); PA1 generally speaking, the presence of the discontinuity in the characteristic of the base current as a function of the base-emitter voltage due to the discrete energy levels leads to instabilities.